How Nanofluidic Chips Were Fabricated By Near-field Electrospinning (NFES)

In recent years, nanofluidic chips have attracted lots of interests because of their high integration. As a typical technology with great compatibility and low cost, NFES has displayed great potential in the preparation of nanofluidic chips. In 2007, Lee et al. demonstrated the integration of chip-to-chip fluidic connectors, as shown in Fig. 9.21A, via NFES to the wire bonding technique in integrated circuit manufacturing. Orderly direct-written fibers were deposited with position precision of better than 10 mm to connect two separated chips, which served as the sacrificial material. Then, the coating process and sacrificial layer etching process were followed to fabricate micro/nanofluidic channels with inner diameter about 0.05-5 mm. Based on NFES, Wang et al. presented complicated wave-shape and grid pattern channels under the predesigned movement of substrate, of which the fabrication process is shown in Fig. 9.21B. Fuh utilized NFES to generate well-aligned and addressable nanofiber arrays, which were used as the master to prepare polydimethylsiloxane stamps. The nanofluidic channel was sealed by bonding with the same polymer or a microscope slide, as shown in Fig. 9.21C, which shows reliable and repeatable performance in the nanofluidic test.